1. Field of the Invention
The present invention relates to a liquid crystal display (LCD) device and a method of fabricating the LCD device, and more particularly, to an array substrate having thin film transistors for the liquid crystal display device and the method of fabricating the array substrate.
2. Description of Related Art
Recently, according to a rapid development in a thin-film-transistor addressed liquid crystal display device (TFT/LCD, hereinafter noted simply as a liquid crystal display device), various portable electric appliances adopt the liquid crystal display device due to its advantage in a light weight and a wide applicability. Thus, an improved manufacturing process technology of the liquid crystal display device becomes required for a cheaper production cost and a higher productivity.
The liquid crystal display device manufacturing process requires repeated steps of depositing and patterning of various layers. The patterning step adopts a photolithography mask step including a light exposing with a mask. Since one cycle of the photolithography step is facilitated with one mask, the number of masks used in the fabrication process is a critical factor in determining the number of patterning steps. Namely, the production cost substantially depends on the number of masks used in the manufacturing process.
Now, referring to the attached drawings, a conventional array substrate of the liquid crystal display device manufactured by a conventional method is explained in detail. For convenience of explanation, the attached drawings of plan views do not illustrate insulating layers interposed between metal films, but the insulating layers are shown in the cross-sectional views.
In FIGS. 1, 2A and 2B, on a transparent insulating substrate 1, a gate line 10 is horizontally formed with a data line 14 formed perpendicular to the gate line 10. Near a cross point between the gate and data lines 10 and 14, a portion of the gate line 10 is protruded as a gate electrode 10a, and, at one end of the gate line 10, a gate pad 10b is positioned. Further, near the cross point between the gate and data lines 10 and 14, a source electrode 14a is protruded from the data line 14, and, spaced apart from the source electrode 14a, a drain electrode 16 is formed. Also at one end of the data line 14, a data pad 14b is positioned.
Herein, in the same layer of the data line 14, between the drain electrode 16 and the gate pad 10b, a capacitor electrode 18 of the same material as the data line 14 is formed in shape of an island. The capacitor electrode 18 overlaps a corresponding portion of the gate line 10 so that the capacitor electrode 18 makes a storage capacitor together with the corresponding overlapped portion of the gate line 10.
FIGS. 2A and 2B illustrate cross-sections taken along lines “A-A” and “B-B” of FIG. 1, respectively. As shown in FIGS. 2A and 2B, a conductive metal layer is deposited on a surface of the substrate 1, and patterned with a first mask so as to form the gate line 10 including the gate electrode 10a and the gate pad 10b. 
On the whole surface including the gate lines of the substrate 1, an insulating material, a semiconductor material, and a doped semiconductor material are sequentially deposited, and patterned with a second mask so as to form a first insulating layer 3, a semiconductor layer 12, and an ohmic contact layer 13.
Next, another conductive metallic material is deposited on the whole surface including the ohmic contact layer 13 of the substrate 1, and thereafter the metal layer and the ohmic contact layer 13 are patterned with a third mask so that the source, drain and capacitor electrodes 14a, 16 and 18 are formed. At this point, between the source and drain electrodes 14a and 16, a back channel is opened so as to expose a portion of the semiconductor layer 12.
FIGS. 3, 4A and 4B illustrate a completed array substrate for the liquid crystal display device.
On the whole surface including the patterned metal layer of FIG. 2, a second insulating layer 7 shown in FIGS. 4A and 4B is deposited, and patterned with a fourth mask so as to form a first to a fourth contact holes 20a, 20b, 20c, and 20d. The first contact hole 20a exposes a portion of the data pad 14b; the second contact hole 20b exposes a portion of the capacitor electrode 18; the third contact hole 20c exposes a portion of the gate pad 10b; and the fourth contact hole 20d exposes a portion of the drain electrode 16. Via the data and gate pads 14b and 16, an outer circuit transmits data and gate signals, respectively.
On the whole surface including the second insulating layer 7, an indium tin oxide (ITO) layer is deposited and patterned so as to form a pixel electrode 24 and a data pad terminal 26; the data pad terminal contacts with the data pad 14b through the first contact hole 20a. 
Further, a portion of the pixel electrode 24 is electrically connected with the capacitor electrode 18 through the second contact hole 20b; another portion of the pixel electrode 24 is electrically connected with the drain electrode 16 through the fourth contact hole 20d. 
At this point, the capacitor electrode 18, electrically connected with the pixel electrode 24 through the second contact hole 20b of FIG. 3, plays a role of an electrode of the storage capacitor; the overlapped portion of the gate line 10 under the capacitor electrode 18 plays a role of the other electrode of the storage capacitor.
Since the above-described conventional method of manufacturing the array substrate of the liquid crystal display device employs too many masks, the method has a disadvantage of too many-repeated photolithography steps, which results in high production cost and inferiority percentage.